What are RISC and CISC CPUs?

What does RISC and CISC mean in relation to CPUs?

RISC and CISC refer to two competing design ideas as to the number of instructions that a CPU should have. CPU instructions present a series of simple building blocks out of which programs are written. For example a CPU will have an instructions to add two numbers, another to multiply numbers, an instruction that can test if one number is bigger than another and so on. A program is composed of collections of these instructions. RISC stands for Reduced Instruction Set Computer and CISC means Complex Instruction Set Computer. As the name implies, RISC is a bet that having fewer instructions in the CPU is the better design and CISC is a bet that having more instructions is better.

There is no exact definition as to how many instructions makes a CPU either RISC or CISC. The Intel CPUs commonly found in desktop PCs, laptops and servers are usually considered CISC processors and typically have over 1000 instructions. ARM CPUs, often used in mobile phones but also some laptops desktops and servers, are considered RISC CPUs and only have in the region of 250 instructions. The exact number of instructions varies with the model of CPU and the intended application. Each specific CPU model can have more of fewer instructions.

As chip technology improves, the overall number of instructions available in each kind of processor has a tendency to climb over time but the important point to remember is the RISC group of CPUs always have fewer instructions when compared with the CISC group from an equivalent generation of CPUs.

So why would you want a CPU with fewer instructions? Isn’t more better? In the early days of CPU design it was observed that most programs spend most of the time only using a small subset of the available instructions. Therefore most of the instructions in a CPU go unused for a great proportion of the time. Each CPU instruction requires circuitry to implement it and so the more instructions a CPU has, the more circuitry is required. CISC designs therefore tend to be physically larger than RISC designs and hence necessitate a larger chip, which is more expensive to produce. However, if the design were to concentrate on only the instructions that are regularly used, it could be smaller and cheaper. This is the general idea behind RISC.

As well as the cost benefits, RISC CPUs also often use less power. When there is less circuitry on a chip it generally has a lower power draw overall. This has made the RISC designs more favourable for mobile phones which require the lowest power draw possible to extend the battery life as well as being cost sensitive applications. Using less power also means there is less heat to dispose of. All electricity that goes into a chip comes out as heat. You may notice that in a desktop PC the CPU often has a large and heavy hunk of metal with a fan attached to it to get rid of the heat. This is not practical in a mobile phone as it would make the device far too bulky as well as being quite literally too hot to handle.

But what happens when one of the more rarely used CISC instructions is needed? In RISC the set of available instructions is designed such that the rarely used instructions from CISC can be built out of the subset of frequently used instructions that are available. Intel’s CISC CPUs have an instruction that can compute the cosine of an angle for example, but RISC CPUs usually do not. A cosine can however be calculated using only the four basic addition, subtraction, multiplication and division operations that the RISC CPU does have, so it will execute a bunch of these instead when a cosine is required. However, executing many instructions will usually be much slower than executing only one instruction as the CISC CPU can do, and so for this specific operation the RISC design might be slower.

The RISC design though has an advantage that can compensate for this. As the CPU design is smaller, it potentially has space going spare on the same size of chip compared with an equivalent CISC design that can be used for extra circuitry and it can throw some of that spare space at the most frequently used instructions. The more circuitry that can be used for any single instruction, generally the faster it can be. For example if there is some spare chip space, a second addition circuit could be implemented in a RISC design so the CPU can perform two additions at the same time whereas a CISC CPU may only have space for one addition circuit due to all of cicruitry for all of the other instructions that are required. The RISC CPU might need to execute more instructions when a cosine operation comes up, but each instruction might be faster than the CISC counterpart and so it narrows the gap in performance. If the RISC design puts too much circuitry into its instructions though, then it might become as a large and power hungry as the CISC processor, therefore making itself less suited to mobile applications. However this design might be better for desktop PCs and servers as the instructions it is expending all of the circuitry on might be the ones that are most frequently used.

Whether the RISC or CISC approach is better depends on what program is running on the machine. Perhaps the user is running a 3D game which needs to do a lot of trigonometry. In which case it might be requiring a lot of cosines of angles calculating, which means the CISC CPU with the special instruction for this might win out. However in a business application adding up the balances of accounts, it might never need to calculate a cosine at all, therefore this special circuitry is completely wasted in the CISC chip. The faster addition circuit of the RISC CPU might be a better use of the very limited space and this design proves to be faster overall.

As well as having fewer instructions, RISC CPUs also often have differences in the way the instructions themselves work as compared with CISC. RISC CPUs more typically require data to be loaded from memory into a register before it can be worked on and have specific separate instructions to do this. This called a load and store architecture. A CISC CPU may allow data in memory to be accessed directly by each individual instruction without requiring the data to be loaded into a register first using a variety of addressing modes. The reason for the difference is the circuitry required to implement the load and store approach, where only a few instructions can access memory, is simpler and smaller than allowing each individual instruction to directly access memory.

RISC instructions are often designed to each take exactly the same length of time to run whereas CISC instructions may take varying amounts of time. It is easier to arrange for all the instructions to require exactly the same time when the CPU has only simple instructions that each do less work than those found in CISC. The advantage of evenly sized or regularised instructions is that it can make certain CPU performance optimisations (such as pipelining) easier to design using less circuitry. Whilst a CISC CPU certainly can (and often does) have similar performance enhancing features to RISC CPUs, the higher circuit complexity required can mean the CPU draws more power and produces more heat to do the same work as well as being more expensive.

There is no definitive answer as to whether RISC or CISC is the better idea as it entirely depends on what program is running and what kind of machine the CPU is used in. Designers have often been able to find clever methods of compensating for some of the deficiencies of each approach and both styles of CPU have persisted to the present day.